From d466f961ab2d645dbb5c456f614f942161599043 Mon Sep 17 00:00:00 2001 From: David A Minton Date: Thu, 23 Feb 2023 15:04:16 -0500 Subject: [PATCH] Fixed a potential divide by zero bug --- src/collision/collision_regime.f90 | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/collision/collision_regime.f90 b/src/collision/collision_regime.f90 index f41f9490a..306b2965d 100644 --- a/src/collision/collision_regime.f90 +++ b/src/collision/collision_regime.f90 @@ -285,12 +285,16 @@ subroutine collision_regime_LS12_SI(Mcb, m1, m2, rad1, rad2, rh1, rh2, vb1, vb2, Mlr = max((1.0_DP - Qr / Qrd_pstar / 2.0_DP) * Mtot, min_mfrag) ! [kg] # LS12 eq (5) end if Mbig = max(m1,Mlr) - Msmall = mtot - Mbig - Mslr_hitandrun = max(calc_Qrd_rev(Msmall, Mbig, Mint, den1, den2, Vimp, c_star), min_mfrag) - if (regime == COLLRESOLVE_REGIME_HIT_AND_RUN ) then - Mslr = Mslr_hitandrun + Msmall = Mtot - Mbig + if (Msmall < min_mfrag) then + regime = COLLRESOLVE_REGIME_MERGE else - Mslr = max(Mtot * (3.0_DP - BETA) * (1.0_DP - N1 * Mlr / Mtot) / (N2 * BETA), min_mfrag) !LS12 eq (37) + Mslr_hitandrun = max(calc_Qrd_rev(Msmall, Mbig, Mint, den1, den2, Vimp, c_star), min_mfrag) + if (regime == COLLRESOLVE_REGIME_HIT_AND_RUN ) then + Mslr = Mslr_hitandrun + else + Mslr = max(Mtot * (3.0_DP - BETA) * (1.0_DP - N1 * Mlr / Mtot) / (N2 * BETA), min_mfrag) !LS12 eq (37) + end if end if Mresidual = Mtot - Mlr - Mslr