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Changed compiler flags to avoid weird divide by zero error that only …
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…happens on the cluster.
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daminton committed Apr 14, 2021
1 parent 567af34 commit 1fe18a3
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Showing 4 changed files with 11 additions and 11 deletions.
6 changes: 3 additions & 3 deletions Makefile.Defines
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Expand Up @@ -53,16 +53,16 @@ VTUNE_FLAGS = -g -O2 -vec -simd -shared-intel -qopenmp -debug inline-debug-info

IDEBUG = -O0 -warn all -nogen-interfaces -no-pie -no-ftz -fpe-all=0 -g -traceback -mp1 -fp-model strict -fpe0 -debug all -align all -pad -ip -prec-div -prec-sqrt -assume protect-parens -CB -no-wrap-margin

STRICTREAL = -mp1 -fp-model strict -prec-div -prec-sqrt -ftz -assume protect-parens
SIMDVEC = -vec -simd -xhost -fma -align all -assume contiguous_assumed_shape -vecabi=cmdtarget -qopt-zmm-usage=high
STRICTREAL = -mp1 -prec-div -prec-sqrt -ftz -assume protect-parens -fp-speculation safe
SIMDVEC = -vec -simd -xhost -fma -align all -assume contiguous_assumed_shape -vecabi=cmdtarget -qopt-zmm-usage=high -fp-model no-except
PAR = -parallel -qopenmp
HEAPARR = -heap-arrays 1048576
OPTIMIZE = -qopt-report=5

#FFLAGS = -init=snan,arrays -traceback -no-wrap-margin -O3 -g -CB -nogen-interfaces -no-pie -fp-speculation=safe $(SIMDVEC) $(PAR) #$(HEAPARR)
FORTRAN = ifort
#FFLAGS = $(IDEBUG)
FFLAGS = -init=snan,arrays -traceback -no-wrap-margin -O3 -g -shared-intel -debug inline-debug-info -qopt-report=5 $(SIMDVEC) $(STRICTREAL)
FFLAGS = -init=snan,arrays -traceback -no-wrap-margin -O3 -g -shared-intel -debug inline-debug-info -qopt-report=5 $(SIMDVEC) $(STRICTREAL) $(PAR)


GDEBUG = -ggdb -g3 -Og -fbacktrace -fbounds-check -fcheck=all -ffpe-trap=zero,invalid,overflow,underflow,denormal
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@@ -1,2 +1,2 @@
#!/bin/bash
/apps/cent7/intel/advisor_2019.3.0.591490/bin64/advixe-cl -collect survey -module-filter-mode=exclude -mrte-mode=managed -interval=10 -data-limit=500 -stackwalk-mode=offline -stack-stitching -mkl-user-mode -no-profile-python -no-support-multi-isa-binaries -no-spill-analysis -no-static-instruction-mix -auto-finalize -project-dir /home/daminton/git/swiftest/examples/rmvs_swifter_comparison/mars_ejecta/ --search-dir sym:p=/home/daminton/git/swiftest --search-dir bin:p=/home/daminton/git/swiftest --search-dir src:rp=/home/daminton/git/swiftest -- /home/daminton/git/swiftest/bin/swiftest_driver rmvs /home/daminton/git/swiftest/examples/rmvs_swifter_comparison/mars_ejecta/config.swiftest.in
/apps/cent7/intel/advisor_2019.3.0.591490/bin64/advixe-cl -collect survey -module-filter-mode=exclude -mrte-mode=managed -interval=10 -data-limit=500 -stackwalk-mode=offline -stack-stitching -mkl-user-mode -no-profile-python -no-support-multi-isa-binaries -no-spill-analysis -no-static-instruction-mix -auto-finalize -project-dir /home/daminton/git/swiftest/examples/rmvs_swifter_comparison/mars_ejecta/rmvs_encounter_check_simd/ --search-dir sym:p=/home/daminton/git/swiftest --search-dir bin:p=/home/daminton/git/swiftest --search-dir src:rp=/home/daminton/git/swiftest -- /home/daminton/git/swiftest/bin/swiftest_driver rmvs /home/daminton/git/swiftest/examples/rmvs_swifter_comparison/mars_ejecta/config.swiftest.in
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Expand Up @@ -4,10 +4,10 @@
!NPLMAX -1 ! not used
!NTPMAX -1 ! not used
T0 0.0e0
TSTOP 730.50e2 ! simulation length in days
DT 2e0 ! stepsize in days
ISTEP_OUT 73500 ! output cadence
ISTEP_DUMP 73500 ! system dump cadence
TSTOP 730.50e3 ! simulation length in days
DT 1e0 ! stepsize in days
ISTEP_OUT 365250 ! output cadence
ISTEP_DUMP 365250 ! system dump cadence
CB_IN cb.swiftest.in
PL_IN pl.swiftest.in
TP_IN tp.in
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6 changes: 3 additions & 3 deletions src/whm/whm_getacch.f90
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Expand Up @@ -225,11 +225,11 @@ pure subroutine whm_getacch_ah3_tp(cb, pl, tp, xh)
if (ntp == 0) return
do j = 1, npl
!$omp simd private(dx,rji2,irij3,fac) reduction(-:aht)
do i = 1, ntp
dx(:) = xht(:, i) - xh(:, j)
do i = 1, tp%nbody
dx(:) = tp%xh(:, i) - xh(:, j)
rji2 = dot_product(dx(:), dx(:))
irij3 = 1.0_DP / (rji2 * sqrt(rji2))
fac = Gmpl(j) * irij3
fac = pl%Gmass(j) * irij3
aht(:, i) = aht(:, i) - fac * dx(:)
end do
end do
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